1. Field of Invention
Various exemplary embodiments of the present invention relate generally to a semiconductor device and a method of operating the same, and more particularly, to a program method of the semiconductor device.
2. Description of Related Art
A semiconductor memory includes a memory cell array in which data is stored. The memory cell array includes a plurality of memory blocks, and each of the memory blocks includes a plurality of cell strings. The cell strings are coupled between a common source line and bit lines. For example, the cell strings are coupled in common to a common source line, and the bit lines are coupled to the cell strings, respectively. Each of the cell strings includes a source select transistor, a plurality of memory cells and a drain select transistor. A source of the source select transistor is coupled to the common source line, and a drain of the drain select transistor is coupled to a bit line. The plurality of memory cells are connected between the source select transistor and the drain select transistor.
A multi-level cell (MLC), which is a single memory cell programmed into one of a plurality of program states, has been widely used. For example, a multi-level cell is programmed into an erase state, a first program state, a second program state, or a third program state depending on a threshold voltage thereof. In addition to the multi-level cell, a triple level cell (TLC) which is a single memory cell programmed into one of more program states than the multi-level cell has gained attention.
As for the multi-level cell or the triple level cell, since a memory cell is programmed into one of a plurality of program states, the reliability of the memory cell may be increased as the voltage difference between threshold voltage distributions corresponding to the respective program states is increased. In addition, as the threshold voltage distribution of programmed memory cells widens, the threshold voltage distribution is more likely to overlap with other threshold voltage distributions of memory cells programmed into different program states. Therefore, different data may be read during a read operation, and the reliability of the semiconductor device may be reduced.